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March 1997
ML4632 Fiber Optic LED Driver
GENERAL DESCRIPTION
The ML4632 is a fiber optic LED driver suited for network applications up to 20Mbps. The part is capable of driving up to 100mA of current through a Fiber Optic LED from an ECL or TTL level input signal. Its efficient output stage provides a high current that can be programmed for accurate absolute output level as well as automatic temperature compensation. The combination of automatic temperature compensation and a highly accurate current driven design insures precise launch power. The LED driver's output stage provides fast, well matched rise and fall times through a unique class B output stage that burns supply current only when the LED is on. A positive temperature coefficient of up to 3300ppm/C can be programmed into the output current to compensate for the negative temperature coefficient of the LED optical output power. An optional peaking circuit may also be employed. The ECL and TTL inputs are ANDed so one can be used for data and the other for an enable input. An ECL compatible BIAS voltage is also provided for single ended ECL applications.
FEATURES
s s s s s s s s
Current Driven Output for accurate Launch Power Programmable output current from 20mA to 100mA Programmable temperature coefficient, 0 to 3300ppm/C High Efficiency Output Stage Programmable LED pre-bias current Low EMI/RFI Noise ECL or TTL inputs Optional Peaking circuit
APPLICATIONS
s s s s
IEEE 802.3, 10BASE-F IEEE 802.5 Fiber Optic Token Ring IEEE 802.4 Fiber Optic Token Bus Fiber Optic Data Communications and Telecommunications
BLOCK DIAGRAM
ECLP 14 ECLN 1
+ BUFFER - PEAK
7
PEAK
6
RPK
VBIAS
2 3 LED DRIVER 5 RTSET
TTL 13
VCC
8
DRV AMP REF PTAT
11 DRV
10 VREF 12 PTAT
GND
4 9 IOFF
1
ML4632
PIN CONFIGURATION
ML4632 14-Pin PDIP (P14)
ECLN VBIAS LED GND RTSET RPK PEAK 1 2 3 4 5 6 7 14 13 12 11 10 9 8 ECLP TTL PTAT DRV VREF IOFF VCC
ML4632 16-Pin Wide SOIC (S16W)
ECLN VBIAS LED GND RTSET RPK PEAK NC
1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9
ECLP TTL PTAT DRV VREF IOFF VCC NC
TOP VIEW
TOP VIEW
PIN DESCRIPTION
NAME FUNCTION NAME FUNCTION
ECLN
Negative ECL data input. Tie to VBIAS for single ended ECL operation or when ECLP is used as an enable. Tie to ground during TTL only operation. BIAS voltage for single ended ECL operation. Fiber optic LED drive pin. Connect the LED between this pin and VCC. Negative power supply. The pin should be tied to the grounded side of RTSET to improve output accuracy and avoid a ground loop. Output current programming pin. Connect a resistor of value VDRV/ILED from this pin to ground to set the high LED output current. Peaking circuit bias pin. Connect a resistor of value VDRV/IPEAK from this pin to ground when using the peaking circuit. Leave open circuited when peaking is not used. Peaking circuit output pin. When using peaking, connect this pin to VCC through a resistor of value RRPK. Then connect a capacitor from this pin to the LED cathode. When peaking is not used, open circuit RPK.
VCC IOFF
Positive power supply. +5 volts. Connect a resistor from this pin to VCC to increase the off current to the LED, i.e. 4.3K for 1mA. With this pin open, the default IOFF current is between 0.5-1.0mA. A constant 1.2V reference output used to set up DRV. A DC input that sets the positive swing on RTSET and the high level output current to the LED. Proportional to Absolute Temperature. A 1.0V reference at 25C that moves proportional to absolute temperature, also used to set up DRV. (See figure 1) TTL data input. Can also be used as an enable during ECL operation. TTL = High (enabled), TTL = Low (disabled). Positive ECL data input controls signal to the LED. Tie to VBIAS during TTL only operation or use as an enable.
VBIAS LED GND
VREF DRV
RTSET
PTAT
RPK
TTL
PEAK
ECLP
2
ML4632
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. VCC ............................................................................... -0.3V to 6V Input Pin Voltages ............................. -0.3V to VCC +0.3V LED Output Current ............................................. 120mA PEAK DC Output Current ..................................... 120mA Storage Temperature .............................. -65C to +150C Lead Temperature (Soldering 10 sec.) ..................... 260C
ELECTRICAL CHARACTERISTICS
SYMBOL ICC VREF VPTAT VOS ILEDH ILEDL tR tF tPLH tPHL tPWD VPK VPKTR VPKTF IECL ITTL VDO IOFF VBIAS
Note 1: Note 2:
Over the recommended operating conditions of TA = 0C to 70C, VCC = 5V 5%, unless otherwise specified. (Note 1)
PARAMETER Supply Current VREF Voltage PTAT Voltage Driver Offset LED Current Accuracy High Low Rise Time Fall Time Propagation Delay Low to High High to Low Pulse Width Distortion Peaking Voltage Peaking Rise Time Peaking Fall Time ECL Input Current TTL Input Current Dropout Voltage between pin 5 and 3 Additional LED Off Current ECL BIAS Voltage VCC = 5V, RIOFF = 4.3K VCC = 5V, TA = 25C 1.5 0.8 1.0 3.8 1.2 LED off No Load No Load, TA = 25C TA = 85C VDRV = 1.2V, RTSET = 20 VDRV = VREF, RTSET = 20 IOFF = open VDRV = VREF, RTSET = 20 VDRV = VREF, RTSET = 20 VDRV = VREF, RTSET = 20 TTL and ECL VDRV = VREF, RTSET = 20 RRPK = 20, CPK = 100pF, RPEAK = 20 RRPK = 20, CPK = 100pF, RPEAK = 20 RRPK = 20, CPK = 100pF, RPEAK = 20 1.08 54 0.5 60 0.7 4.5 4.5 10.0 10.0 1.0 1.2 4.5 4.5 20 100 2.0 1.32 1.14 0.9 1.08 CONDITIONS MIN TYP 25 1.20 1.0 1.2 MAX 35 1.26 1.1 1.32 50 66 1.0 UNITS mA V V V mV mA mA ns ns ns ns ns V ns ns A A V mA V
Limits are guaranteed by 100% testing, sampling or correlation with worst-case test conditions. Low Duty cycle pulse testing is performed at TA .
3
ML4632
FUNCTIONAL DESCRIPTION
The ML4632 accepts ECL and TTL input signals and generates a high speed, high accuracy output current which is independent of supply voltage variations. The output current is programmable from 20mA to 100mA. A temperature coefficient can be programmed into the output current and a peaking circuit can be added with a few external components. The input of the LED driver accepts both ECL and TTL signals. The ECL input stage is a standard NPN differential pair with a common mode range of between 3V and 4.5V with a +5V supply. A bias voltage VBIAS is available for biasing either ECL input for single-ended operation. The TTL input has a standard switching range of between 0.8V and 2.0V. These inputs are ANDed so that the extra input can be used as an enable. Output current to the LED is set by connecting the appropriate resistance from RTSET to ground. With the VREF and DRV pins tied together, the high level output voltage at RTSET will be 1.2V. The current through the LED. The output current with RTSET set to 20 will be ILED (HIGH) = 1.2V/RTSET = 1.2V/20 = 60mA. The low level output current is set internally by a resistor at approximately 0.7mA. This current prebiases the LED and results in faster optical rise times. The value of this current can be increased by connecting a resistor from the IOFF pin to VCC . The additional current will be equal to (VCC - 0.7V)/R IOFF. The voltage input at the DRV pin appears across the RTSET pin when the LED is turned on. The current in RTSET is directed through the LED. Therefore the voltage set at DRV along with the RTSET resistor sets current through the LED. A temperature coefficient of between 0ppm/C and 3300ppm/C can be programmed into the high level output current to compensate for the drop in LED optical output power at high temperatures. This is accomplished by driving the DRV pin from a resistor divider between the VREF and PTAT pins. When DRV is tied directly to PTAT, the peak voltage at RTSET will be 1.0V at 25C and have a 3300ppm/C temperature coefficient. At 85C, PTAT is 1.2V and equal to VREF. An arbitrary temperature coefficient less than 3300 ppm/C can be set by using a resistor divider between PTAT and VREF to set the voltage at DRV, as shown in figure 1.
REF PTAT PTAT (12) R2 VREF (10) R1 DRV (11) DRV AMP TO DRIVER
Figure 1. Current for Programming Output Temperature Coefficient
In this configuration the temperature coefficient is TCILED = (3300ppm / C) R1 , and R1+ R2
ILED (HIGH)
1V + 0.2V R2 R1+ R2 = RTSET
The output current will be a linear function of temperature. A plot of ILED versus temperature for several values of the programming resistance, R1 and R2, in figure 2.
60
R1 = 1
R2 = 3R1 R1 = R2
55
ILED (mA)
R1 = 3R2 50
R2 = 0
NOTE: R1 + R2 10k 45 0 25 50 T(C) 75 85
Figure 2. ILED vs T, R TSET = 20
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ML4632
The ML4632 output stage conducts full load current only when the LED is on, and even then power dissipation in the part is low because most of the +5V supply voltage is dropped across the LED and external resistor RTSET. Even with a low power design, the LED driver junction temperature will rise above ambient due to quiescent power dissipation and won't exactly match the LED junction temperature since it is also self-heating. Therefore, the effectiveness of a temperature compensated design will be related to component power dissipations, thermal conductance of the PC board and packaging, and the proximity of the LED driver to the LED. The ML4632 also provides for peaking of the LED output current. Peaking is used to counteract the effects of the LED junction capacitance. By creating a controlled overshoot and undershoot in the output current waveform, charge is transferred to and from the LED capacitance on the rising and falling edges of the output, speeding up rise and fall times. To provide peaking current, a second output stage is biased up with a resistor from RPK to ground and another from PEAK to VCC . When these bias resistors are set equal to each other, a pulse will be generated across the RPEAK resistor with a magnitude equal to the voltage on the DVR pin. A coupling capacitor transfers the rising and falling edges of the output current waveform. A typical application is shown in figure 3. When the resistors RRPK and RPEAK are both set to 20, a pulse will be generated at the PEAK pin of magnitude 1.2V and equivalent resistance 20 (assuming VDRV = 1.2V).
PEAK PEAK RPK
RPEAK 20
CPEAK 100pF
LED DRIVER RTSET
RPK 20
RTSET 20
Figure 3. Application of the Peaking Circuit The peaking current is coupled through the 100pF capacitor, CPEAK, which will transfer 120pC of charge to and from the LED on each cycle of output current. The peaking circuit shown provides approximately a 70% overshoot current into a 0 LED impedance. Peaking currents will be slightly lower for real LED's.
IOUT = 60mA IOFF = 0.7mA ECLN VBIAS IOUT LED GND 20 20 RTSET RPK PEAK 20 +5V 0.1F ECLP TTL PTAT DRV VREF IOFF VCC 4.7F TTL IN
CPEAK 100pF
Note:
The LED, PEAK and V CC traces should be very short and shielded with a GND plane to reduce ringing and overshoot at the LED.
TTL Driven Implementation (No Temp. Comp)
5
ML4632
6
ML4632
Package: P14 14-Pin PDIP
0.740 - 0.760 (18.79 - 19.31) 14
PIN 1 ID
0.240 - 0.260 0.295 - 0.325 (6.09 - 6.61) (7.49 - 8.25)
0.070 MIN (1.77 MIN) (4 PLACES)
1 0.050 - 0.065 (1.27 - 1.65) 0.100 BSC (2.54 BSC) 0.015 MIN (0.38 MIN)
0.170 MAX (4.32 MAX)
0.125 MIN (3.18 MIN)
0.016 - 0.022 (0.40 - 0.56)
SEATING PLANE
0 - 15
0.008 - 0.012 (0.20 - 0.31)
7
ML4632
Package: S16W 16-Pin Wide SOIC
0.400 - 0.414 (10.16 - 10.52) 16
0.291 - 0.301 0.398 - 0.412 (7.39 - 7.65) (10.11 - 10.47) PIN 1 ID
1 0.024 - 0.034 (0.61 - 0.86) (4 PLACES) 0.050 BSC (1.27 BSC) 0.095 - 0.107 (2.41 - 2.72) 0 - 8
0.090 - 0.094 (2.28 - 2.39)
0.012 - 0.020 (0.30 - 0.51)
SEATING PLANE
0.005 - 0.013 (0.13 - 0.33)
0.022 - 0.042 (0.56 - 1.07)
0.009 - 0.013 (0.22 - 0.33)
ORDERING INFORMATION
PART NUMBER ML4632CP ML4632CS TEMPERATURE RANGE 0C to 70C 0C to 70C PACKAGE 14-Pin PDIP (P14) 16-Pin Wide SOIC (S16W)
(c) Micro Linear 1997 is a registered trademark of Micro Linear Corporation Products described in this document may be covered by one or more of the following patents, U.S.: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; Japan: 2598946. Other patents are pending.
Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design. Micro Linear does not assume any liability arising out of the application or use of any product described herein, neither does it convey any license under its patent right nor the rights of others. The circuits contained in this data sheet are offered as possible applications only. Micro Linear makes no warranties or representations as to whether the illustrated circuits infringe any intellectual property rights of others, and will accept no responsibility or liability for use of any application herein. The customer is urged to consult with appropriate legal counsel before deciding on a particular application.
2092 Concourse Drive San Jose, CA 95131 Tel: 408/433-5200 Fax: 408/432-0295
DS4632-01
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